Logic gate symbols
Every gate in both standards: the ANSI distinctive shapes used on most American schematics, and the IEC rectangles used in European and formal documents. Same gates, two drawings.
The 7 logic gate symbols
AND a ∧ b
High only when every input is high.
OR a ∨ b
High when at least one input is high.
NOT ¬a
Outputs the opposite of its single input.
XOR a ⊻ b
High when its two inputs disagree.
NAND ¬(a ∧ b)
The inverse of AND, and enough to build everything else.
NOR ¬(a ∨ b)
High only when every input is low.
XNOR ¬(a ⊻ b)
High when its two inputs agree.
Note that NAND is simply the AND shape with a bubble, and NOR is OR with a bubble. XOR is OR with one extra line across its back, which is easy to miss on a dense drawing, and XNOR is that shape with a bubble.
Logic gate symbols chart
All seven gates with the ANSI and IEC symbol, the boolean expression in three notations, and the truth table.
| Gate | ANSI / IEEE | IEC 60617 | Expression | Truth table | |||||||||||||||
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| AND 1 when every input is high | a ∧ b a && b |
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| OR 1 when at least one input is high | a ∨ b a || b |
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| NOT 1 when its single input is low | ¬a !a |
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| XOR 1 when its two inputs differ | a ⊻ b a ^ b |
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| NAND 1 when any input is low | ¬(a ∧ b) !(a && b) |
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| NOR 1 when every input is low | ¬(a ∨ b) !(a || b) |
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| XNOR 1 when its two inputs are equal | ¬(a ⊻ b) !(a ^ b) |
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The three expressions say the same thing: a bar or ¬ or ! is NOT, ·, ∧ and && are AND, and +, ∨ and || are OR. Each gate's own page has its full truth table for more inputs, and the truth table generator makes one for any expression.
Download the chart
All seven gates in both standards on one image, for notes or a slide.
Click to download: Logic gate symbols chart
IEC symbols: what &, ≥1, =1 and 1 mean
In IEC 60617 every gate is the same rectangle, so the label inside carries the whole function. Most labels are a count of how many inputs must be 1 for the output to be 1 (≥1, =1, 2k+1); & means every input, and = means all inputs are equal. A handful of short labels covers every gate.
| Label | Name | Output is 1 when | Used for |
|---|---|---|---|
| & | AND | every input is 1 | AND, NAND |
| ≥1 | OR | at least one input is 1 | OR, NOR |
| =1 | Exclusive OR | exactly one input is 1 | XOR |
| = | Logic identity | all inputs are equal | XNOR |
| 1 | Buffer | its single input is 1 | NOT |
Inversion is the same bubble as in the ANSI shapes. NAND is the & rectangle with a bubble on its output, NOR is ≥1 with a bubble, and NOT is the 1 buffer with a bubble. XNOR is drawn two ways: =, or =1 with a bubble. For two inputs they are the same function.
With three or more inputs, =1 and a chain of XOR gates part ways. =1 means exactly one input is 1, while a ⊕ b ⊕ c is 1 whenever an odd number of inputs is 1, all three included. IEC labels that odd parity function 2k+1.
The bubble: what the circle on a gate means
One convention carries most of the meaning on a schematic: a small circle means invert.
- On the output, it negates the gate. AND becomes NAND, OR becomes NOR, and the NOT triangle is really just a buffer with a bubble.
- On an input, it means that pin is active low: the signal is inverted before the gate sees it. An AND with both inputs bubbled behaves as a NOR, which is De Morgan's law drawn rather than written.
- On a clock pin of a flip-flop, a bubble in front of the edge triangle means the part triggers on the falling edge rather than the rising one.
This is why experienced engineers redraw gates with bubbles moved around: pushing bubbles through a gate swaps AND for OR and often makes a schematic read more directly.
ANSI vs IEC logic gate symbols
The distinctive shapes are often called the ANSI, IEEE or American symbols; they are defined in ANSI/IEEE Std 91-1984. The rectangles are the IEC 60617 symbols, often called the European symbols, and in Germany the DIN symbols after DIN EN 60617. Both describe the same seven gates, and both use the bubble for inversion.
If you are drawing for other people, match whatever they already use. American textbooks and most schematic capture tools default to the ANSI shapes, and they have a real advantage: the outline tells you the function at a glance, even at small sizes or in a photocopy. IEC rectangles win when a part has many inputs or unusual behaviour, because there is always room for a label, and they are what international standards documents expect.
The simulator on this site uses neither. The editor draws every node as a labelled box, which is closer to IEC in spirit and keeps custom nodes and gates looking consistent.
Questions about logic gate symbols
What is the difference between ANSI and IEC logic gate symbols?
The distinctive shapes give each gate its own outline: a D for AND, a shield for OR, a triangle for NOT. They come from MIL-STD-806 and are kept in ANSI/IEEE Std 91-1984, which is why they are usually just called the ANSI symbols — though that standard defines rectangular forms too. IEC 60617-12 uses one rectangle for every gate with a label inside saying what it does: & for AND, ≥1 for OR, 1 for a buffer, =1 for XOR. American schematics tend to use ANSI, European and formal standards documents tend to use IEC.
Which logic gate symbols are used in Europe?
Formally, the IEC 60617 rectangles, adopted in Europe as EN 60617 and in Germany as DIN EN 60617, which is why they are often called the European or DIN symbols. Each gate is a rectangle with a label: & for AND, ≥1 for OR, =1 for XOR. The ANSI shapes are widely understood in Europe as well, and plenty of European schematics use them.
What does ≥1 mean on a logic gate?
It is the IEC label for OR. Most IEC labels are a count of how many inputs must be 1 for the output to be 1, and ≥1 means at least one. The AND label & means every input, and =1 means exactly one, which for two inputs is XOR.
What does the little circle on a gate symbol mean?
That bubble means inversion. An AND with a bubble on its output is a NAND; an OR with one is a NOR; the triangle with a bubble is a NOT gate. A bubble on an input means that input is active low, so it is inverted before the gate acts on it.
What are the symbols for AND and OR gates?
In the ANSI style the AND symbol has a flat back and a smooth semicircular nose, like a capital D. The OR symbol has a curved back and comes to a point. In the IEC style both are rectangles, labelled & for AND and ≥1 for OR. In boolean algebra AND is written A · B or A ∧ B, and OR is A + B or A ∨ B.
How is XOR drawn?
Exactly like OR, with a second curved line drawn just behind the back of the shape. That extra line is the only difference, so it is worth looking twice at a busy schematic. In IEC form the rectangle is labelled =1, meaning exactly one input is high.